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Clamper Circuits:

        Claming is a process of introducing d.c. level into a signal . Example. If the input voltage swings from -10 V and
        +10  V  a  positive  d.c.  clamper  will  produce  the  output  that  swings  ideally  from  0  V  to  +  20  V.   The  complete
        waveform is lifted up by +10 V so as to just touch the horizontal axis.

Negative Diode clamper: Fig25
During first positive half cycle as Vi rises from 0 to 10 V, the diode conducts. Assuming an ideal diode, its
voltage, which is also the output must be zero during the time from 0 to t1. Howver, the capacitor charges
during this period to 10 V. With the polarity shown. At the same time (t1). Vi starts to drop which means the
anode of D is negative relative to cathode, (VD = Vi - Vc) thus reverse biasing the diode and preventing the
capacitor from discharging. fig 26 . Since the capacitor is holding its charge it behaves as a D.C. voltage
source while the diode appears as an open circuit the equivalent circuit becomes like as shown in fig .27
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Fig. 26
Fig. 27
Positive Clamper:  Fig.28
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Thus circuit behaves as if a 10 V dc. Source had been placed in series with ac. generate, this shift every voltage by -10 V.

     To clamp the input signal other than 0 V, d.c. source is required. Fig. 30. The d.c. source is reverse biasing the
     diode. In the negative half cycle when the voltage exceed 5V then D conduct. During -5 V to 10 V, the capacitor
     charges to 5 V with the polarity shown. After that D becomes reverse biased. ( VD = V i - 5 V - 5 V ), and open
     circuited. Then complete a.c. signal is shifted upward by 5 V.
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Fig. 30
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